PROF A K RATHOD; AKU SHIREESHA. Low-Power CAM-Based In-Memory Multiplier with Operand Bypass Optimization. American Journal of AI Cyber Computing Management, [S. l.], v. 6, n. 3, p. 149–162, 2026. DOI: 10.64751/ajaccm.2026.v6.n3.737. Disponível em: https://ajaccm.com/journal/index.php/ajaccm/article/view/737. Acesso em: 13 sep. 2026.