RESILIENT AND SUSTAINABLE FAULT MANAGEMENT APPROACHES FOR NEXT-GENERATION MEMORY ARCHITECTURES

Abstract

The authors propose a sustainable and FPGA-implementable approach to error correction in deeply scaled memories, SFaultMap. The novel fault map architecture optimizes operational and embodied energy, achieving lower energy consumption over a five-year lifetime under moderate to high fault rates. SFaultMap+ enhances fault tolerance by shifting focus from error correction overhead to system-level sustainability and hardware efficiency. The modular Verilog design allows real-time fault masking, scalable support for continuation segments, fault threshold tuning, and fast decoding. The architecture has been validated through functional simulation and synthesis using Xilinx Vivado