Transformer Embeddings with Attention-Gated Structural Fusion for HDL Vulnerability Localization

Abstract

Hardware Description Language (HDL) vulnerabilities present a critical security risk in modern integrated circuit design, often leading to hardware Trojans or side-channel leakage. Traditional vulnerability detection methods, such as static analysis and manual code review, frequently struggle with the complex, non-linear dependencies inherent in structural hardware logic. This research proposes an advanced automated framework for HDL Vulnerability Localization utilizing Transformer Embeddings integrated with Attention-Gated Structural Fusion. The methodology leverages the allMiniLM-L6-v2 sentence-transformer model to map HDL code segments into a high-dimensional semantic vector space, capturing intricate functional relationships that standard tokenization misses. To evaluate the efficacy of the proposed approach, a comparative analysis was conducted against several baseline machine learning architectures, including Decision Tree Classifiers (DTC), Nearest Centroid (NC), and Bernoulli Restricted Boltzmann Machines (RBM). Experimental results demonstrate that the baseline models achieved competitive performance, with the NC and DTC models yielding accuracies of 89.50% and 88.75%, respectively. However, the Proposed Ridge Classifier configuration significantly outperformed all baselines, achieving a perfect 1.0000 score across Accuracy, Precision, Recall, and F1-Score. These results suggest that the combination of Transformer-based semantic extraction and linear regularization effectively separates vulnerable code patterns from secure implementations. This study concludes that embedding-based structural fusion provides a robust, scalable solution for enhancing the security of the hardware supply chain by precisely localizing vulnerabilities within complex HDL datasets.